The Intel 4004

4004 4004 The world's first computer on a chip.

Intended for the brains of a calculator, it turned into a universal microprocessor as powerful as ENIAC

See the 30th birthday tribute at Federico Faggin's 4004 Home site, the Wiki entry, a short history and the spec.

 

Appearing in IEEE Computer 1972

" Intel has introduced an integrated CPU complete with a 4-bit parallel adder, sixteen 4-bit registers, an accumula- tor and a push-down stack on one chip. It's one of a family of four new ICs which comprise the MCS-4 micro computer system--the first system to bring the power and flexibility of a dedicated general-purpose computer at low cost in as few as two dual in-line packages.

MSC-4 systems provide complete computing and con- trol functions for test systems, data terminals, billing machines, measuring systems, numeric control systems and process control systems.

The heart of any MSC-4 system is a Type 4004 CPU, which includes a set of 45 instructions. Adding one or more Type 4001 ROMs for program storage and data tables gives a fully functioning micro-programmed com- puter. Add Type 4002 RAMs for read-write memory and Type 4003 registers to expand the output ports.

Using no circuitry other than ICs from this family of four, a system with 4096 8-bit bytes of ROM storage and 5120 bits of RAM storage can be created. For rapid turn-around or only a few systems, Intel's erasable and re-programmable ROM, Type 1701, may be substituted for the Type 4001 mask-programmed ROM.

MCS-4 systems interface easily with switches, key- boards, displays, teletypewriters, printers, readers, A-D converters and other popular peripherals. For further information, circle the reader service card 87 or call Intel at (408) 246-7501. "

 

Specification

  • 3mm by 4mm die (1/8in by 1/6in) chip
  • 10 micron technology
  • p channel MOS
  • 2300 transistors
  • 500 kHz to 740 kHz
  • typically 60000 instructions/sec.
  • 50 8 bit instuctions (originally only had 46 instructions)
  • 15 Volts DC
  • 16 package pins, welded on
  • initially US $200
  • 4-bit processor
  • 4-bit data; 8 or 12 bit address (256byte max program len)
  • BCD instructions (1 digit at a time)
  • accumulator
  • program counter
  • no interrupts
  • no stack pointer (JSR but no stack, nesting up to 3 levels)
  • 16 general purpose registers (4-bit)
  • drives 4k bytes ROM (16 4001s)
  • drives 1280 nibbles of RAM (16 4002s)
  • address and data multiplexed on same 4-bit bus.
  • for memory write, the device wrote three nibbles to get address (latched outside device), then the 4-bit data.
  • November of 1971, first microcomputer (Intel), MCS-4 system used 4004 microprocessor, 4001 ROM, 4002 RAM, and 4003 shift register.

 

Pinouts


                  _______    _______                   
                _|       \__/       |_                 
       <--> D0 |_|1               16|_| RAM0 -->       
                _|                  |_                 
       <--> D1 |_|2               15|_| RAM1 -->       
                _|                  |_                 
       <--> D2 |_|3               14|_| RAM2 -->       
                _|                  |_                 
       <--> D3 |_|4               13|_| RAM3 -->       
                _|       4004       |_                 
     (+5v) Vss |_|5               12|_| Vdd (-10v)     
                _|                  |_                 
      --> CLK1 |_|6               11|_| ROM  -->       
                _|                  |_                 
      --> CLK2 |_|7               10|_| TST <--        
                _|                  |_                 
      <-- SYNC |_|8                9|_| RST <--        
                 |__________________|

 

Instruction Set

Mnemonic W1 W2 T Description
NOP 00   E No Operation
JCM c,aa 1c aa G Jumps to ROM address aa depending on c
FIM Rm,dd 2s dd I Fetch Immediate (Mov dd to reg pair s)
SRC Rm 2t   C Send Register Control 1
FIN Rm 3s   B Fetch Indirect(Mov ROM at @R0R1 to s)
JIN Rm 3t   C Jump Indirect (Jump to @t)
JUN aaa 4a aa F Jump Unconditional to ROM address aaa
JMS aaa 5a aa F Jump to Subroutine at ROM address aaa
INC Rn 6r   A Increment register r
ISZ Rn aa 7r aa H Increment register r jump to aa on Zero
ADD Rn 8r   A Add register r to accumulator with carry
SUB Rn 9r   A Subtract r to accumulator with borrow
LD Rn Ar   A Load accumulator with contents of r
XCH Rn Br   A Exchange contents of r and accumulator
BBL d Cd   D Branch back (in stack) load imm d to accum
LDM d Dd   D Load imm to accumulator
WRM E0   E Write contents of accumulator to RAM
WMP E1   E Write contents of accum to RAM output port
WRR E2   E Write contents of accum to ROM I/O lines
WPM E3   E Write accum to selected half-byte 2
WR0 E4   E Write selected RAM status character 0 1
WR1 E5   E Write RAM status char1 to accum 1
WR2 E6   E Write RAM status char2 to accum 1
WR3 E7   E Write RAM status char3 to accum 1
SBM E8   E Subtract selected RAM from accum 1
RDM E9   E mov selected RAM to the accum 1
RDR EA   E mov contents of ROM I/O lines to accum1
ADM EB   E Add selected RAM to accum with carry 1
AD0 EC   E Read selected RAM status character 0 1
AD1 ED   E Read RAM status char1 from accum 1
AD2 EE   E Read RAM status char2 from accum 1
AD3 EF   E Read RAM status char3 from accum 1
CLB F0   E Clear Both (Accumulator and Carry)
CLC F1   E Clear Carry
IAC F2   E Increment Accumulator
CMC F3   E Complement Carry
CMA F4   E Complement Accumulator
RAL F5   E Rotate Left Accumulator and Carry
RAR F6   E Rotate Right Accumulator and Carry
TCC F7   E Transfer Carry to Accumulator then Clear
DAC F8   E Decrement Accumulator
TCS F9   E Transfer Carry subtract then Clear
STC FA   E Set Carry
DAA FB   E Decimal Adjust Accumulator
KBP FC   E Keyboard Process 3
DCL FD   E Designate command line

 

Instruction Format

Word1 Word2 Type Notes
----rrrr   A rrrr=R0/R1/.../RE/RF (4 bits)
----rrr0   B rrr=R0R1/.../RERF (3 bits)
----rrr1   C rrr=even numbered Reg Pairs (see above)
----dddd   D dddd=4 bits of immediate data
--------   E  
----xxxx XX F aaaa=upper 4 bit address XX=Lower 8 addr
----cccc XX G cccc=condition reg. XX=Lower 8 bit addr
----rrrr XX H rrrr=R0/R1/.../RE/RF XX=Lower 8 bit addr
----rrr0 DD I DD=Data

 

Hex Variable Description
r R0/R1/R2/R3/.../RD/RE/RF
s Reg Pairs R0R1/.../RERF followed by bin 0
t Reg Pairs R0R1/.../RERF followed by bin 1
a Upper Address A11,A10,A9,A8
aa Middle and Lower Address A7,A6,..,A1,A0
d Four bits of immediate data
dd Eight bits of immediate data
c condition reg. c1c2c3c4 4

 

Mnemonic Variable Description
Rn R0/R1/R2/R3/.../RD/RE/RF (4 bits)
Rm Reg pairs R0R1/R2R3/R4R5/.../RERF (3 bits)
dd 8 bits of immediate data
d 4 bits of immediate data
aa 8 bit address
aaa 12 bit address
c condition reg. c1c2c3c4 4

 

Notes

  1. SRC selects the address (And RAM banks) for the I/O instructions (All instructions with an "E" OPR)
  2. For use with 4008/4009
  3. Converts contents of the accumulator from a one out of four code to a binary code
  4. c1: Invert Jump Condition (if c1==1)
    c2: Accumulator Equals Zero Condition
    c3: Carry Equals One Condition
    c4: Test Signal (TST - Pin 10) equals Zero Condition